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Computation Structures
Syllabus

Course Description

This course offers an introduction to the engineering of digital systems. Starting with MOS transistors, the course develops a series of building blocks - logic gates, combinational and sequential circuits, finite-state machines, computers and finally complete systems. Both hardware and software mechanisms are explored through a series of design examples.

This course is required material for any undergraduate who wants to understand (and ultimately design) digital systems. A good grasp of the material is essential for later courses in digital design, computer architecture and systems. Before taking this course, students should feel comfortable using computers; a rudimentary knowledge of programming language concepts and electrical fundamentals is assumed.

Learning Objectives

On completion of this course, students will be able to:

  • Understand the role of abstraction in the design of large digital systems, and explain the major software and hardware abstractions in contemporary computer systems.
  • Analyze the performance of digital systems using measures such as latency and throughput.
  • Design simple hardware systems based on a variety of digital abstractions such as ROMs and logic arrays, logic trees, state machines, pipelining, and buses.
  • Synthesize digital systems from a library of representative components and test the designs under simulation.
  • Understand the operation of a moderately complex digital system - a simple RISC-based computer - down to the gate level, and be able to synthesize, implement, and debug its components.
  • Appreciate the technical skills necessary to be a capable digital systems engineer.

Measurable Outcomes

Upon completion of this course, students will be able to:

  • Identify flaws and limitations in simple systems implemented using the static discipline (noise assumptions, etc).
  • Identify flaws and limitations in simple systems implemented using clocked registers with asynchronous inputs (metastability issues).
  • Identify flaws and limitations in simple systems implemented using pipelined processors (pipeline hazards).
  • Identify flaws and limitations in simple systems implemented using semaphores for process synchronization (deadlocks).
  • Identify flaws and limitations in simple systems implemented using shared-memory multiprocessors (sequential inconsistency).
  • Characterize the logic function of combinational devices using CMOS, ROM, or PLA technologies.
  • Explain synthesis issues for combinational devices using CMOS, ROM, or PLA technologies from their functional specification.
  • Explain synthesis of acyclic circuits from combinational components.
  • Calculate performance characteristics of acyclic circuits with combinational components.
  • Explain and calculate performance characteristics of single-clock sequential circuits.
  • Design, debug, and test combinational circuits of the complexity of an arithmetic logic unit.
  • Design, debug, and test a controller for a finite-state machine.
  • Pipeline a combinational circuit for improved throughput.
  • Understand issues affecting microprocessor instruction set design.
  • Complete and debug the design of a simple CPU with a given RISC-based intruction set.
  • Measure the memory access performance of a processor, and tune cache design parameters to improve performance.
  • Analyze the operation of page-based virtual memory systems.
  • Translate simple programs from C to machine language.
  • Deduce processor state from a memory snapshot during execution.

 



This material was created by or adapted from material created by MIT faculty member, Steve Ward, Chris Terman, Professors, 2002. Copyright © 2002 Steve Ward, Chris Terman.
This material is licensed by the Massachusetts Institute of Technology under a Creative Commons License.
This license is available at: http://ocw.mit.edu/OcwWeb/Global/terms-of-use.htm